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Rapid interconnect and logic testing of FPGA device
Rapid interconnect and logic testing of FPGA device
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机译:FPGA器件的快速互连和逻辑测试
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摘要
A FPGA device that includes a plurality of programmable logic blocks connected to each other through interconnect resources, one or more sets of registers connected to the interconnect resources for configuring the programmable logic blocks. Additional logic is provided with the registers for selecting an interconnect/logic block testing mode thereby enabling a rapid interconnect/logic testing.
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