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Integrated circuit having self test capability using message digest and method for testing integrated circuit having message digest generation circuitry

机译:具有使用消息摘要的自测试能力的集成电路以及用于测试具有消息摘要生成电路的集成电路的方法

摘要

An integrated circuit that includes operational circuitry and message digest generation circuitry coupled to the operational circuitry, a method for testing an integrated circuit including message digest generation circuitry, and a system including an integrated circuit (which includes message digest generation circuitry) and at least one external device coupled to the integrated circuit. The message digest generation circuitry is coupled and configured to generate at least one digest of at least one message, where each message is indicative of at least one aspect of the integrated circuit's state. For example, a message can be a sequence of voltages or logic levels sampled at a specific sequence of nodes of operational circuitry of the integrated circuit.
机译:一种集成电路,包括运算电路和耦合到该运算电路的消息摘要生成电路;一种用于测试包括消息摘要生成电路的集成电路的方法;以及一种系统,该系统包括集成电路(包括消息摘要生成电路)和至少一个连接至集成电路的外部设备。消息摘要生成电路被耦合并配置为生成至少一个消息的至少一个摘要,其中每个消息指示集成电路状态的至少一个方面。例如,消息可以是在集成电路的操作电路的节点的特定序列处采样的电压或逻辑电平的序列。

著录项

  • 公开/公告号US7539304B1

    专利类型

  • 公开/公告日2009-05-26

    原文格式PDF

  • 申请/专利权人 JAMES D. LYLE;

    申请/专利号US20020298722

  • 发明设计人 JAMES D. LYLE;

    申请日2002-11-18

  • 分类号H04K1/00;

  • 国家 US

  • 入库时间 2022-08-21 19:29:55

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