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Distributed hierarchical partitioning framework for verifying a simulated wafer image
Distributed hierarchical partitioning framework for verifying a simulated wafer image
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机译:分布式分层分区框架,用于验证模拟晶圆图像
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摘要
A system that verifies a simulated wafer image against an intended design. During operation, the system receives a design. Next, the system generates a skeleton from the design, wherein the skeleton specifies cell placements and associated bounding boxes for the cell placements, but does not include geometries for the cell placements. The system then computes environments for cell placements based on the skeleton. Next, the system generates templates for cell placements, wherein a template for a cell placement specifies the cell placement and the environment surrounding the cell placement. The system then generates the simulated wafer image by performing model-based simulations for cell placements associated with unique templates.
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