首页>
外国专利>
Early high speed serializer-deserializer (HSS)internal receive (Rx) interface for data sampling clock signals on parallel bus
Early high speed serializer-deserializer (HSS)internal receive (Rx) interface for data sampling clock signals on parallel bus
展开▼
机译:早期的高速串行器/解串器(HSS)内部接收(Rx)接口,用于并行总线上的数据采样时钟信号
展开▼
页面导航
摘要
著录项
相似文献
摘要
In a method for reading data from a serial data source in a parallel format, data from the serial data source is deserialized by placing a plurality of predefined units of data onto a parallel bus and asserting a deserialization clock when each of the plurality of predefined units is valid on the parallel bus. A delayed clock pulse is generated a predetermined amount of time after each assertion of the deserialization clock. Each delayed pulse is repeated so as to generate an end point repeated clock pulse corresponding to each delayed pulse wherein the predetermined amount of time is an amount of time that ensures that each predefined unit of data on the parallel bus is valid when each end point repeated clock pulse is asserted.
展开▼