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FAULT-TOLERANT COMPUTER SYSTEM, RE-SYNCHRONIZATION METHOD THEREOF AND RE-SYNCHRONIZATION PROGRAM THEREOF

机译:容错计算机系统,其重新同步方法及其重新同步程序

摘要

A lock-step synchronism fault-tolerant computer system includes a plurality of computing modules having a processor and a memory in which each computing module processes the same instruction string in synchronization with each other. When disagreement in a state of access to an external bus among the respective processors in each computing module is detected, if no fault is detected in the system including the respective computing modules, an interruption is notified to all of said processors. Synchronization among each computing module is recovered by adjusting timing of a response to an access which each processor executes by an interruption.
机译:锁步同步容错计算机系统包括具有处理器和存储器的多个计算模块,其中每个计算模块彼此同步地处理相同的指令串。当检测到每个计算模块中的各个处理器之间在访问外部总线的状态上存在分歧时,如果在包括各个计算模块的系统中未检测到故障,则将中断通知给所有所述处理器。通过调整对每个处理器通过中断执行的访问的响应时序来恢复每个计算模块之间的同步。

著录项

  • 公开/公告号CA2434494C

    专利类型

  • 公开/公告日2008-11-25

    原文格式PDF

  • 申请/专利权人 NEC CORPORATION;

    申请/专利号CA20032434494

  • 发明设计人 AINO SHIGEYUKI;YAMAZAKI SHIGEO;

    申请日2003-07-07

  • 分类号G06F11/16;G06F15/16;

  • 国家 CA

  • 入库时间 2022-08-21 19:23:29

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