首页> 外国专利> NEGATIVE N-EPI BIASING SENSING AND HIGH SIDE GATE DRIVER OUTPUT SPURIOUS TURN-ON PREVENTION DUE TO N-EPI P-SUB DIODE CONDUCTION DURING N-EPI NEGATIVE TRANSIENT VOLTAGE

NEGATIVE N-EPI BIASING SENSING AND HIGH SIDE GATE DRIVER OUTPUT SPURIOUS TURN-ON PREVENTION DUE TO N-EPI P-SUB DIODE CONDUCTION DURING N-EPI NEGATIVE TRANSIENT VOLTAGE

机译:N-EPI负瞬态电压引起的N-EPI P-SUB二极管导通导致N-EPI负偏置感测和高端门极驱动器输出可能的开启预防

摘要

A high-side driver in a driver circuit for driving a half-bridge stage having high- and low-side power switching devices series connected at a switched node, the high-side driver driving the high-side power switching device The high-side driver including first and second complementary switched MOSFET series connected at a highside node, driving the high-side power switching device, one of the MOSFETs having a parasitic bipolar transistor formed between the substrate, an N+ epitaxial region connected to the high-side driver supply voltage and the switched node, with the parasitic transistor having a base electrode formed by the N+ epitaxial region, an emitter electrode formed by the substrate and a collector electrode formed by the switched node, such if a transient voltage that is negative with respect to the substrate is present at the highside driver supply voltage, the parasitic transistor will conduct a short circuit current between the switched node and the substrate.
机译:在驱动电路中用于驱动半桥级的高端驱动器,该半桥级具有在开关节点处串联连接的高端和低端功率开关器件,该高端驱动器驱动高端功率开关器件。驱动器,包括在高端节点连接的第一和第二互补开关MOSFET串联,驱动高端功率开关器件,其中一个MOSFET具有在衬底之间形成的寄生双极晶体管,一个N +外延区,连接到高端驱动器电源寄生晶体管具有由N +外延区形成的基极,由衬底形成的发射极和由开关节点形成的集电极的寄生晶体管,例如瞬态电压相对于晶体管如果衬底在高侧驱动器电源电压处存在,则寄生晶体管将在开关节点和衬底之间传导短路电流。

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