A CLOCK SYNCHRONIZATION SYSTEM AND METHOD FOR THE ADVANCED TELECOMMUNICATION COMPUTING ARCHITECTURE

摘要

A clock synchronization system and method for an advanced telecommunication computing architecture are provided, the system is located in a circuit box which includes a node board (5) and a backboard, the system includes a clock subcard (1), a clock back plug-in module (14) and a small backboard module in the middle layer; the clock back plug-in module (14) accesses the exterior clock reference and transfers it to the clock subcard (1) via the small backboard in the middle layer, receives the cascaded clock signal and provides the output interface; the clock subcard (1) receives and processes the exterior clock reference and selects a reference clock, after processing it into three kinds of clock, distributes them respectively to three clock buses on the backboard, outputs a cascaded synchronization clock, transfers it to the clock back plug-in module (14) by the small backboard module in the middle layer; the small backboard module in the middle layer interlinks the clock reference, accessing interfaces of every clock subcard and interlinks the cascaded clock output interfaces. The present invention saves clock resources, reduces costs, only requires a single clock-back plug-in card, only requires one cable for outputting the cascaded synchronization clock, reduces the complexity and enhances the reliability of the system.