A CLOCK SYNCHRONIZATION SYSTEM AND METHOD FOR THE ADVANCED TELECOMMUNICATION COMPUTING ARCHITECTURE

摘要

The present invention provides a clock synchronization system and method for an advanced telecommunication compute setup. The system is located in a mainframe-box which includes a node board (5) and a backboard, and the system comprises a clock subcard (1), a clock rear plug-in module (14), and a small backboard module in a middle layer; the clock rear piug-in module (14) is used to access exterior clock reference and transfer it to the clock subcard (1) via the small backboard module in a middle layer, receive cascaded clock signals and provide an output interface; the clock subcard (1) is used to receive and process the exterior clock reference, select a reference clock, and after processing it into three kinds of clocks, distribute them respectively to three clock buses on the backboard, output a cascaded synchronous clock and send it to the clock rear plug-in module (14) via the small backboard module in the middle layer; the small backboard module in the middle layer is used to interlink accessing interfaces for clock reference of each clock subcard and interlink cascaded clock output interfaces. The present invention saves clock resources and reduces costs, meanwhile reduces complexity and enhances the reliability of the system since the system only requires one clock rear plug-in card and one cable for outputting cascaded synchronous clocks.