首页> 外国专利> COMBINED INVERSE FAST FOURIER TRANSFORM AND GUARD INTERVAL PROCESSING FOR EFFICIENT IMPLEMENTATION OF OFDM BASED SYSTEMS

COMBINED INVERSE FAST FOURIER TRANSFORM AND GUARD INTERVAL PROCESSING FOR EFFICIENT IMPLEMENTATION OF OFDM BASED SYSTEMS

机译:高效的基于OFDM的系统的组合快速傅里叶逆变换和Guard间隔处理

摘要

A circuit for converting frequency domain information to time domain information includes an Inverse Fast Fourier Transform circuit having a length of N coefficients. The Inverse Fast Fourier Transform circuit is adapted to receive input data of length N coefficients and generate output data of length N coefficients that are circularly shifted by m coefficients. The circuit also includes Cyclical Prefix Insertion circuit adapted to insert a cyclical prefix of length m. The Cyclical Prefix Insertion circuit includes a first switch, connected to the Inverse Fast Fourier Transform circuit, a buffer, having an input connected to the first switch and an output, the buffer having a length m, and a second switch, coupled to the first switch and to the buffer. The first and second switches selectively couple the output of the buffer and the Inverse Fast Fourier Transform circuit to an output of the second switch. The buffer is reduced to length m.
机译:用于将频域信息转换为时域信息的电路包括具有N个系数的长度的快速傅立叶逆变换电路。快速傅里叶逆变换电路适于接收长度为N个系数的输入数据,并生成长度为N个系数的输出数据,该数据循环移位m个系数。该电路还包括循环前缀插入电路,其适于插入长度为m的循环前缀。循环前缀插入电路包括:第一开关,其连接到逆快速傅立叶变换电路;缓冲器,其输入端连接到第一开关;以及输出,缓冲器的长度为m;第二开关,其耦合到第一开关。切换到缓冲区。第一和第二开关将缓冲器和快速傅立叶逆变换电路的输出选择性地耦合到第二开关的输出。缓冲区减小到长度m。

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