首页> 外国专利> HETERO JUNCTION SEMICONDUCTOR DEVICE APPLYING 3D NANO STRUCTURE BUFFER LAYER, IMPROVING A DEVICE CHARACTERISTIC BY MINIMIZING A DEFECT IN A THIN FILM DUE TO LATTICE MISMATCH

HETERO JUNCTION SEMICONDUCTOR DEVICE APPLYING 3D NANO STRUCTURE BUFFER LAYER, IMPROVING A DEVICE CHARACTERISTIC BY MINIMIZING A DEFECT IN A THIN FILM DUE TO LATTICE MISMATCH

机译:采用3D纳米结构缓冲层的异质结半导体器件,由于晶格不匹配而使薄膜中的缺陷最小化,从而改善了器件的特性

摘要

PURPOSE: A hetero junction semiconductor device applying a 3D nano structure buffer layer is provided to minimize a defect in a thin film by forming the buffer layer between a substrate and a thin film device.;CONSTITUTION: A 3D nano structure made of III-V group compound is interposed between a GaAs substrate or a Si substrate and a device structure. The III-V compound is the compound of one or more selected among the group comprised of AlSb, InSb, GaSb, AlGaSb, InGaSb, AlInSb, Ga(Sb,As), In(Sb,As), Al(Sb,As), AlGaInSb, AlGa(Sb,As) and AlIn(Sb,As). The nano structure is formed by a self-assembling method or electron-beam lithography.;COPYRIGHT KIPO 2010
机译:目的:提供一种应用3D纳米结构缓冲层的异质结半导体器件,以通过在基板和薄膜器件之间形成缓冲层来最大程度地减少薄膜中的缺陷。;组成:由III-V制成的3D纳米结构族化合物插入在GaAs衬底或Si衬底与器件结构之间。 III-V化合物是选自AlSb,InSb,GaSb,AlGaSb,InGaSb,AlInSb,Ga(Sb,As),In(Sb,As),Al(Sb,As)中的一种或多种的化合物。 ,AlGaInSb,AlGa(Sb,As)和AlIn(Sb,As)。纳米结构通过自组装方法或电子束光刻形成。; COPYRIGHT KIPO 2010

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