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Register scan where, 1984 and method of test of a circuit, 1984, with the aid of such a register
Register scan where, 1984 and method of test of a circuit, 1984, with the aid of such a register
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机译:借助这种寄存器,进行1984年的套准扫描和1984年的电路测试方法
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摘要
The present invention relates to a register scan parametric. It also relates to a method of testing of a digital circuit with the aid of such a register. The register scan, parametric includes a memory cell (21) having at least one data input (d), adapted to receive a datum of the test (e _ scan), and transferring on its output (s), a representative signal (62) of the input data, by means of a synchronization signal (h). It further comprises a block of parametric test (42) whose input is connected to the output (s) of the cell (21), the output signal (62) of the cell being transferred to the output (s _ reg) of the block (42) through an internal module (61), the internal module operating according to the modes able to modify the output signal (62) of the cellule.l' invention applies in particular for the test of integrated circuits with a high integration density, for example in the field of nano-technology.
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