PULSE GENERATING CIRCUIT, PULSE WIDTH MODULATOR, DELAY CIRCUIT AND SWITCHING POWER SUPPLY CONTROL CIRCUIT EMPLOYING THE SAME

摘要

PPROBLEM TO BE SOLVED: To provide a pulse generating circuit, pulse width modulator and delay circuit, wherein power consumption is reduced. PSOLUTION: A pulse generating unit 42 receives a clock CLK at a predetermined frequency and generates a pulse signal PWM1 which transits synchronously with the positive edge of the clock. An inverter 44 inverts the clock CLK. A flip-flop 46 obtains the pulse signal PWM1 each time a positive edge occurs in an inverted clock CLK# output from the inverter 44. A logic gate 48 multiplexes the pulse signal PWM1 and an output PWM2 of the flip-flop 46. A selector 50 selects either the output of the logic gate 48 or the pulse signal PWM1. PCOPYRIGHT: (C)2010,JPO&INPIT