首页> 外国专利> LAYOUT EVALUATION DEVICE, LAYOUT EVALUATION PROGRAM, DUMMY RULE GENERATION DEVICE, AND DUMMY RULE GENERATION PROGRAM

LAYOUT EVALUATION DEVICE, LAYOUT EVALUATION PROGRAM, DUMMY RULE GENERATION DEVICE, AND DUMMY RULE GENERATION PROGRAM

机译:布局评估设备,布局评估程序,虚拟规则生成设备和虚拟规则生成程序

摘要

PPROBLEM TO BE SOLVED: To perform flat evaluation to each circuit layout at high speed to support dummy fill. PSOLUTION: Wiring density, a total perimeter length of wiring, and a range of density difference maximum value where a height variation when CMP (Chemical Mechanical Polishing/Chemical Mechanical Planarization) is performed to a layout pattern is an upper limit are obtained as a critical region. Then, mesh division of an input layout is performed to calculate wiring density, the total perimeter length of wiring, and the density differential maximal value of each mesh as mesh data, and a critical map showing whether or not mesh data of each mesh are in the critical region and a predicted value of the height variation of the whole pattern are calculated. PCOPYRIGHT: (C)2010,JPO&INPIT
机译:

要解决的问题:高速对每个电路布局进行平坦评估,以支持虚拟填充。

解决方案:获得当对布局图进行CMP(化学机械抛光/化学机械平坦化)时高度变化的布线密度,布线总周长和密度差最大值的范围的上限作为关键区域。然后,进行输入布局的网格划分,以计算布线密度,布线的总周长以及每个网格的密度微分最大值作为网格数据,以及示出每个网格的网格数据是否在其中的临界图。计算出整个图案的临界区域和高度变化的预测值。

版权:(C)2010,日本特许厅&INPIT

著录项

  • 公开/公告号JP2010102680A

    专利类型

  • 公开/公告日2010-05-06

    原文格式PDF

  • 申请/专利权人 FUJITSU LTD;

    申请/专利号JP20090112742

  • 发明设计人 NITTA IZUMI;

    申请日2009-05-07

  • 分类号G06F17/50;H01L21/82;

  • 国家 JP

  • 入库时间 2022-08-21 19:00:04

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