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SYMMETRIC MULTI-PROCESSOR OPERATING SYSTEM FOR ASYMMETRIC MULTI-PROCESSOR ARCHITECTURE

机译:非对称多处理器体系结构的对称多处理器操作系统

摘要

A method and system for supporting multi-processing within an asymmetric processor architecture in which processors support different processor specific functionality. Instruction sets within processors having different functionalities are modified so that a portion of the functionality of these processors overlaps within a common set of instructions. Code generation for the multi-processor system (e.g., compiler, assembler, and/or linker) is performed in a manner to allow the binary code to be generated for execution on these diverse processors, and the execution of generic tasks, using the shared instructions, on any of the processors within the multiple processors. Processor specific tasks are only executed by the processors having the associated processor specific functionality. Source code directives are exemplified for aiding the compiler or assembler in properly creating binary code for the diverse processors. The invention can reduce processor computation requirements, reduce software latency, and increase system responsiveness.
机译:一种用于在非对称处理器体系结构中支持多处理的方法和系统,其中处理器支持不同的处理器特定功能。修改具有不同功能的处理器内的指令集,以使这些处理器的一部分功能在公共指令集内重叠。多处理器系统(例如,编译器,汇编器和/或链接器)的代码生成以某种方式执行,以允许使用共享程序生成二进制代码以在这些不同的处理器上执行以及执行常规任务。多个处理器中任何一个处理器上的指令。处理器特定的任务仅由具有关联的处理器特定功能的处理器执行。示例了源代码指令,以帮助编译器或汇编器为各种处理器正确创建二进制代码。本发明可以减少处理器计算需求,减少软件等待时间,并增加系统响应度。

著录项

  • 公开/公告号US2010242014A1

    专利类型

  • 公开/公告日2010-09-23

    原文格式PDF

  • 申请/专利权人 XIAOHAN ZHU;

    申请/专利号US20090405555

  • 发明设计人 XIAOHAN ZHU;

    申请日2009-03-17

  • 分类号G06F9/46;G06F9/06;G06F9/44;

  • 国家 US

  • 入库时间 2022-08-21 18:54:35

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