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Method and Algorithm of High Precision On-Chip Global Biasing Using Integrated Resistor Calibration Circuits

机译:使用集成电阻校准电路的高精度片上全局偏置的方法和算法

摘要

Systems and methods for providing bias currents to multiple analog circuits are disclosed. An integrated circuit comprises a calibration circuit which compares a high tolerance external component to a plurality of internal components manufactured to span the variability of the process, voltage and temperature. The best fitting internal component is communicated to bias circuits which can select an internal component from a local plurality of internal components with matching desired characteristics. In this manner, analog circuits can be locally biased with the tolerance usually associated with a high tolerance external reference component, without the necessity for a local external reference component.
机译:公开了用于向多个模拟电路提供偏置电流的系统和方法。一种集成电路,包括校准电路,该校准电路将高公差的外部组件与制造为跨越过程,电压和温度的可变性的多个内部组件进行比较。最佳拟合的内部组件被传送到偏置电路,该偏置电路可以从本地多个具有匹配所需特性的内部组件中选择一个内部组件。以这种方式,模拟电路可以以通常与高容限外部参考组件相关联的容差来局部偏置,而无需本地外部参考组件。

著录项

  • 公开/公告号US2009315617A1

    专利类型

  • 公开/公告日2009-12-24

    原文格式PDF

  • 申请/专利权人 RAY ROSIK;WEINAN GAO;

    申请/专利号US20080143546

  • 发明设计人 RAY ROSIK;WEINAN GAO;

    申请日2008-06-20

  • 分类号G05F1/10;

  • 国家 US

  • 入库时间 2022-08-21 18:52:59

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