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Architecture of function blocks and wirings in a structured ASIC and configurable driver cell of a logic cell zone

机译:结构化ASIC中的功能块和布线的架构以及逻辑单元区域的可配置驱动器单元

摘要

An integrated semiconductor circuit has a regular array of logic function blocks (L) and a regular array of wiring zones (X) corresponding thereto. The wiring lines in at least one wiring layer of a wiring zone (X) are realized as line segments that are continuous within the wiring zone and are interrupted at zone boundaries. Furthermore, the semiconductor circuit comprises driver cells that surround a logic cell of the logic function block in an L-shaped manner.
机译:集成半导体电路具有逻辑功能块(L)的规则阵列和与其对应的布线区(X)的规则阵列。布线区域(X)的至少一个布线层中的布线被实现为在布线区域内连续并且在区域边界处中断的线段。此外,半导体电路包括以L形方式围绕逻辑功能块的逻辑单元的驱动器单元。

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