Techniques for Implementing an Engineering Change Order in an Integrated Circuit Design

摘要

A technique for implementing an engineering change order (ECO) includes comparing a first hardware description language (HDL) design with a second HDL design. In this case, the second HDL design corresponds to the first HDL design with at least one implemented ECO. The technique identifies differences in latch points, primary inputs, and primary outputs between the first and second HDL designs. The second HDL design is converted to a non-optimized netlist. Logical cones (cones of logic) that feed the latch points, the primary inputs, and the primary outputs are extracted from the non-optimized netlist. Based on the extracted logical cones and the non-optimized netlist, a physical implementation of the second HDL design is synthesized.