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Designated MOSFET and driver design to achieve lowest parasitics in discrete circuits
Designated MOSFET and driver design to achieve lowest parasitics in discrete circuits
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机译:指定的MOSFET和驱动器设计可实现分立电路中的最低寄生
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摘要
Apparatus are described for a pair of MOSFET power transistors, a MOSFET driver, and an idealized circuit layout utilized in a power stage such as that of a power conversion system. The power stage comprises a pair of MOSFET transistors having substantially identical electrical characteristics and complementary package configurations for simplifying and optimizing the layout of the power stage on a single side or layer of a printed circuit board. The ideal layout effectively avoids parasitic circuit components, minimizes layout area and costs, and permits operation at higher switching frequencies. A new MOSFET transistor pin configuration is also described that is essentially a functional mirror or functional complement of an existing MOSFET transistor pin configuration to provide the complementary package configurations and the optimized PCB layout. A customized MOSFET driver pin configuration further optimizes the power stage layout by arranging the pins of the driver to coordinate with those of the MOSFET transistor pair.
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