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Method and system having instructions with different execution times in different modes, including a selected execution time different from default execution times in a first mode and a random execution time in a second mode
Method and system having instructions with different execution times in different modes, including a selected execution time different from default execution times in a first mode and a random execution time in a second mode
A method and system for controlling timing in a processor is disclosed. In one aspect of the present invention, the method comprises fetching a plurality of instructions, wherein each instruction has a first default execution time during a first condition, and wherein each instruction has a second default execution time during a second condition; during a first mode, executing the plurality of instructions within a same execution time regardless of whether a condition is the first condition or the second condition; and during a second mode, executing the plurality of instructions within random execution time regardless of whether a condition is the first condition or the second condition. According to the system and method disclosed herein, the method effectively modifies the timing of a processor by controlling and/or minimizing variations in the execution times of instructions.
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