Multi-standard variable block size motion estimation processor

摘要

An apparatus generally having a first circuit and a second circuit is disclosed. The first circuit may be configured to generate a plurality of sum values by adding a plurality of pixel difference values between a current block and a reference block, one of the sum values corresponding to each of a plurality of smallest partitions of the current block. The second circuit configured to (i) generate a plurality of intermediate values from the sum values, one of the intermediate values corresponding to each of a plurality of possible partitions of the current block, (ii) store a plurality of lowest values among the intermediate values as the current block is moved through a search window and (iii) generate a motion signal conveying at least one motion vector based on the lowest values.