Test vector generating method and test vector generating program of semiconductor logic circuit device

摘要

The X-type of each bit permutation is determined (step 301). When there are X-types except for X-type 1, i.e., X-type with no don't-care bits, total capture state transition numbers TECTA₁ and TECTA₂ for capture clock pulses C₁ and C₂ are calculated (step 303). As a result, when TECTA₁TECTA₂, an X-type is selected for the capture clock pulse C₁ and a first X-filling processing is performed (see step 305). On the other hand, when TECTA₁≦TECTA₂, an X-type is selected for the capture clock pulse C₂ and a second X-filling processing is performed (step 306).