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Boundary-scan input circuit for a reset pin

机译:复位引脚的边界扫描输入电路

摘要

A boundary-scan circuit method and apparatus for asserting an internal reset signal connected to core logic circuits of an electronic device in order to assure that testing will begin and end in a safe, known logic state. A safe end state is assured even if the system reset signal on an input pin of the electronic device is logically disconnected from the internal reset connection to the core logic, as often occurs in boundary-scan and related testing.
机译:一种边界扫描电路方法和装置,用于断言连接到电子设备核心逻辑电路的内部复位信号,以确保测试将在安全的已知逻辑状态下开始和结束。即使在边界扫描和相关测试中经常发生,即使电子设备输入引脚上的系统复位信号从内部复位连接逻辑上断开与核心逻辑的逻辑断开,也可以确保安全的结束状态。

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