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Enhancing relocatability of partial configuration bitstreams

机译:增强部分配置比特流的可重定位性

摘要

Enhancing relocatability of partial configuration bitstreams from a first area to a second area of programmable logic of an integrated circuit is described. A first set and a second set of logic resources of the programmable logic are identified. The first set and the second set of logic resources are respectively associated with the first area and the second area, the second area being wholly or partially offset from the first area. Differences between the first set of logic resources and the second set of logic resources are identified. The differences are associated with one or more of different types of circuit resources in each of the first area and the second area. Prohibit constraints associated with the differences are set.
机译:描述了增强从集成电路的可编程逻辑的第一区域到第二区域的部分配置比特流的可重定位性。识别可编程逻辑的第一组和第二组逻辑资源。第一组和第二组逻辑资源分别与第一区域和第二区域相关联,第二区域与第一区域完全或部分偏移。识别第一组逻辑资源和第二组逻辑资源之间的差异。所述差异与第一区域和第二区域中的每个中的一个或多个不同类型的电路资源相关联。设置与差异相关的禁止约束。

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