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Non-volatile memory architecture for programmable-logic-based system on a chip

机译:用于基于可编程逻辑的片上系统的非易失性存储器架构

摘要

A programmable system-on-a-chip integrated circuit device includes a programmable logic block. A digital input/output circuit block is coupled to the programmable logic block. A SRAM block is coupled to the programmable logic block. At least one non-volatile memory block is coupled to the programmable logic block. A JTAG port is coupled to the programmable logic block. An analog circuit block including an analog-to-digital converter may be coupled to the programmable logic block and an analog input/output circuit block may be coupled to the analog circuit block.
机译:可编程片上系统集成电路器件包括可编程逻辑块。数字输入/输出电路块耦合到可编程逻辑块。 SRAM块耦合到可编程逻辑块。至少一个非易失性存储块耦合到可编程逻辑块。 JTAG端口耦合到可编程逻辑块。包括模数转换器的模拟电路块可以耦合到可编程逻辑块,并且模拟输入/输出电路块可以耦合到模拟电路块。

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