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System for reducing number of lookups in a branch target address cache by storing retrieved BTAC addresses into instruction cache
System for reducing number of lookups in a branch target address cache by storing retrieved BTAC addresses into instruction cache
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机译:通过将检索到的BTAC地址存储到指令高速缓存中来减少分支目标地址高速缓存中查找次数的系统
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摘要
A technique for reducing lookups to a branch target address cache (BTAC) is disclosed. In this technique, a branch target address is retrieved from the BTAC in response to a miss in looking up an instruction address in an instruction cache (I-cache). The branch target address is associated with the instruction address. The branch target address retrieved from the BTAC is stored in the I-cache. With this disclosed technique, subsequent instruction addresses are looked up in the I-cache, nonparallel to the BTAC, thus saving power by reducing needless BTAC lookups.
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