首页> 外国专利> CHIP TESTER, METHOD FOR PROVIDING TIMING INFORMATION, TEST FIXTURE SET, APPARATUS FOR POST-PROCESSING PROPAGATION DELAY INFORMATION, METHOD FOR POST-PROCESSING DELAY INFORMATION, CHIP TEST SET UP AND METHOD FOR TESTING DEVICES UNDER TEST

CHIP TESTER, METHOD FOR PROVIDING TIMING INFORMATION, TEST FIXTURE SET, APPARATUS FOR POST-PROCESSING PROPAGATION DELAY INFORMATION, METHOD FOR POST-PROCESSING DELAY INFORMATION, CHIP TEST SET UP AND METHOD FOR TESTING DEVICES UNDER TEST

机译:芯片测试器,提供定时信息的方法,测试夹具组,用于后处理传播延迟信息的设备,用于后处理延迟信息的方法,芯片测试建立以及用于在测试下测试设备的方法

摘要

A chip tester for testing at least two devices under test connected to the chip tester comprises a timing calculator for generating a timing information for the Channels of the chip tester. The timing calculator is adapted to obtain a propagation delay difference information describing a difference between, on the one hand, a propagation delay from the first Channel port of the chip tester to the first terminal of the first device under test and, on the other hand, a propagation delay from the first Channel port of the chip tester to the second terminal of the second device under test. The timing calculator is adapted to provide a timing information for a second Channel of the chip tester connected to the first device under test or to the second device under test on the basis of the propagation delay difference information. The Channel module configurator is adapted to configure the second Channel of the chip tester on the basis of the timing information.
机译:一种芯片测试仪,用于测试连接到芯片测试仪的至少两个被测设备,包括时序计算器,该时序计算器用于生成芯片测试仪的通道的时序信息。定时计算器适于获得传播延迟差信息,该信息一方面描述了从芯片测试仪的第一通道端口到被测第一设备的第一端子的传播延迟之间的差异,另一方面描述了之间的差异。从芯片测试仪的第一通道端口到被测第二设备的第二端子的传播延迟。时序计算器适于基于传播延迟差信息为连接到第一被测设备或第二被测设备的芯片测试器的第二通道提供时序信息。通道模块配置器适于基于定时信息来配置芯片测试器的第二通道。

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