Memory architecture with integrated self-test (BIST) having distributed command interpretation and generalized command protocol.

摘要

A system comprising: a built centralized controller self-test (BIST) that (4) stores a adapted to check a plurality of modules (12, 12A) memory algorithm, characterized in that the plurality of modules (12, 12A ) memory with timing requirements and physical characteristics different in the BIST (4) controller stores the algorithm as a set of generalized commands that conform a command protocol; and a plurality of sequencers distributed (8, 8A), adapted to receive said commands from the BIST controller (4), that interpret the commands based on the command protocol, and apply the generalized modules (12, 12A) commands memory, where each sequencer is associated with one or more modules (12, 12A) and memory in which at least two of the sequencers are associated with memory modules having timing requirements and physical characteristics different.