INTEGRATED CIRCUIT SEMICONDUCTOR DEVICE WITH DIFFERENT GATE STACKS BETWEEN A CELL REGION AND A CORE/PERI REGION AND A MANUFACTURING METHOD THEREOF, CAPABLE OF REDUCING A POLY GATE DEPLETION PHENOMENON ON THE CORE/PERI REGION

摘要

PURPOSE: An integrated circuit semiconductor device and a manufacturing method thereof are provided to prevent the deterioration of a MOS transistor on a cell region by differently forming a gate insulation layer and a gate electrode according to the cell region and a core/peri region.;CONSTITUTION: An integrated circuit semiconductor device includes a semiconductor substrate(10), a first gate stack(35), and a second gate stack(42). The semiconductor substrate is divided into a cell region and a core/peri region. The gate stack includes a first gate insulation layer(16) and a first gate electrode(34). The first gate insulation layer is comprised of a silicon oxidation layer. The first gate electrode is comprised of a poly silicon layer. The poly silicon layer is doped with impurity. The second gate stack includes a second gate dielectric layer(37) and a second gate electrode(41). The second gate insulation layer includes a high-K dielectric layer. The second gate electrode includes a metal layer.;COPYRIGHT KIPO 2010