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SEMICONDUCTOR DEVICE AND A LAYOUT METHOD THEREOF, CAPABLE OF FORMING BIT LINE PATTERNS USING DOUBLE PATTERNING TECHNOLOGY
SEMICONDUCTOR DEVICE AND A LAYOUT METHOD THEREOF, CAPABLE OF FORMING BIT LINE PATTERNS USING DOUBLE PATTERNING TECHNOLOGY
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机译:半导体装置及其布局方法,能够使用双图案技术形成位线图案
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摘要
PURPOSE: A semiconductor device and a layout method thereof are provided to connect page buffer patterns with bit line patterns with different pitches by including a connection pattern.;CONSTITUTION: A semiconductor device includes a main array(310), a first page buffer(330), and a second page buffer(340). A plurality of bit line patterns(BLP1,BLP2) are provided. A plurality of pad patterns(PADP1) are respectively connected to the plurality of bit line patterns. At least one contact is formed on the pad patterns. The pitch of the pad pattern is longer than the pitch of the bit line patterns.;COPYRIGHT KIPO 2010
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