首页> 外国专利> A method of forming a trace by a damascene process using a contact mask formed hard mask

A method of forming a trace by a damascene process using a contact mask formed hard mask

机译:一种使用镶嵌掩模形成的硬掩模通过镶嵌工艺形成迹线的方法

摘要

A wire line is formed by forming a bit line after forming a second contact used as a storage node contact so that electrical connection between a second contact and a lower semiconductor substrate can be reliably formed. Formation of a wire line by a damascene involves forming a first insulating layer on a semiconductor substrate; etching the first insulating layer to form a contact hole; forming a first conductive layer over the first insulating layer that fills the contact hole; patterning the first conductive layer; forming a storage node contact that fills the contact hole and is electrically connected to the semiconductor substrate; forming a hard mask over the storage node contact; etching the first insulating layer using the hard mask as an etch mask to form a trench in the first insulating layer; forming a bit line that is electrically connected to the semiconductor substrate in the trench; forming a second insulating layer that covers the bit line; planarizing the second insulating layer and the hard mask; and forming a storage node on the storage node contact.
机译:通过在形成用作存储节点接触的第二接触之后形成位线来形成布线,从而可以可靠地形成第二接触与下部半导体衬底之间的电连接。通过金属镶嵌形成布线涉及在半导体衬底上形成第一绝缘层;该第二绝缘层形成在第一绝缘层上。蚀刻第一绝缘层以形成接触孔;在第一绝缘层上形成第一导电层,以填充接触孔;构图第一导电层;形成存储节点接触,其填充接触孔并电连接到半导体衬底;在存储节点触点上方形成硬掩模;使用硬掩模作为蚀刻掩模来蚀刻第一绝缘层以在第一绝缘层中形成沟槽;在沟槽中形成电连接到半导体衬底的位线;形成覆盖位线的第二绝缘层;平坦化第二绝缘层和硬掩模;在所述存储节点触点上形成存储节点。

著录项

  • 公开/公告号DE102004007244B4

    专利类型

  • 公开/公告日2010-03-11

    原文格式PDF

  • 申请/专利权人 SAMSUNG ELECTRONICS CO. LTD.;

    申请/专利号DE20041007244

  • 发明设计人

    申请日2004-02-13

  • 分类号H01L21/8242;H01L21/283;H01L21/768;

  • 国家 DE

  • 入库时间 2022-08-21 18:29:09

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