首页> 外国专利> Electrically EPROM e.g. NOR flash memory, integrity verifying method for e.g. onboard system, involves deducing integrity of electrically EPROM from verification of physical address groups, on completion of cycle of verification processes

Electrically EPROM e.g. NOR flash memory, integrity verifying method for e.g. onboard system, involves deducing integrity of electrically EPROM from verification of physical address groups, on completion of cycle of verification processes

机译:电气EPROM例如NOR快闪记忆体,例如机载系统,涉及在完成验证过程的周期时,从物理地址组的验证中推导出电子EPROM的完整性

摘要

The method involves dividing an electrically EPROM (EEPROM) into physical address groups, and executing a cycle of verification processes, where each process has selection and integrity verification steps. Each group is selected based on a group selection function, which guarantees that the groups are selected at the end of the cycle. Integrity of each selected group is verified against a control value. The processes are held in a time such that time intervals are elapsed between the processes. Integrity of the EEPROM is deduced from verification of the groups, on completion of the cycle. An independent claim is also included for an onboard system comprising a group selection function.
机译:该方法涉及将电EPROM(EEPROM)划分为物理地址组,并执行一个验证过程循环,其中每个过程都有选择和完整性验证步骤。每个组均基于组选择功能进行选择,该功能可确保在循环结束时选择组。对照对照值验证每个选定组的完整性。将过程保持在一定的时间,以便在过程之间经过时间间隔。 EEPROM的完整性由循环完成时的组验证得出。对于包括组选择功能的车载系统也包括独立权利要求。

著录项

  • 公开/公告号FR2933791A1

    专利类型

  • 公开/公告日2010-01-15

    原文格式PDF

  • 申请/专利权人 TRUSTED LOGIC;

    申请/专利号FR20080003875

  • 发明设计人 VETILLARD ERIC;APVRILLE AXELLE;

    申请日2008-07-08

  • 分类号G06F12/14;

  • 国家 FR

  • 入库时间 2022-08-21 18:26:45

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