Processing simultaneous analogue signals of short duration in a tracking radar

摘要

In order to subject simultaneous signals received by a chirp radar, such as sum and difference signals, to identical analogue processing, the signals each pass at different times (by suitable delays) through the same processing stages V1, V2, V3etc. The n processing stages each receive an analogue signal E1, E2, E3and each has an amplifier and filter F1, F2, F3and a delay circuit τ1, τ2, τ3respectively. A first set of switches C1, C2, C3interconnect the inputs and outputs of the various elementary processing stages in order to pass each signal through all the n elementary stages V1, V2, V3successively and sequentially for a processing cycle, and a second set of switches C1, C2, C3outputs the processed signals. Application is to the fine analysis of the echo signals received from a target consisting of several bright points, by a pulse compression radar.