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Multidimensional interpolation device, multi-dimensional interpolation method, and computer program

机译:多维插值装置,多维插值方法和计算机程序

摘要

PPROBLEM TO BE SOLVED: To easily materialize a rapid interpolational process such as conversion in color space and the like in as small circuit structure as possible. PSOLUTION: An N-dimensional digital image signal 205 is divided to a higher bit signal 212 and a lower bit signal 214 by means of a data divider 210. A referential value corresponding to all the combination of the divided higher bit signal is divisionally stored without overlapping into 2SPN-1/SPpieces of submemories (multi-dimensional LUT 260), and at the same time (N+1) pieces of referential values necessary for the interpolational process are simultaneously read out by a referential-value reader 250. As a result, the interpolational process can be rapidly performed, and an address can be produced without divider for accessing to the submemory. Therefore, the interpolational process at high speed such as the conversion in color space and the like can be materialized in as small circuit structure as possible. PCOPYRIGHT: (C)2010,JPO&INPIT
机译:

要解决的问题:在尽可能小的电路结构中轻松实现快速的插值处理,例如色彩空间中的转换等。

解决方案:N维数字图像信号205通过数据除法器210分为高位信号212和低位信号214。与分割后的高位信号的所有组合相对应的参考值是分区存储,不重叠到2个 N-1 个子存储器(多维LUT 260)中,同时(N + 1)个插值过程所需的参考值被同时读出通过参考值读取器250。结果,可以快速地执行内插处理,并且可以产生地址而无需用于访问子存储器的分频器。因此,可以在尽可能小的电路结构中实现诸如色彩空间中的转换等的高速插值处理。

版权:(C)2010,日本特许厅&INPIT

著录项

  • 公开/公告号JP4810615B2

    专利类型

  • 公开/公告日2011-11-09

    原文格式PDF

  • 申请/专利权人 キヤノン株式会社;

    申请/专利号JP20100062833

  • 发明设计人 伊藤 忠幸;

    申请日2010-03-18

  • 分类号H04N1/46;G06T1/00;G06T1/20;H04N1/60;

  • 国家 JP

  • 入库时间 2022-08-21 18:19:41

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