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REDUCING PIPELINE RESTART PENALTY

机译:减少管道重罚

摘要

Techniques are disclosed relating to reducing the latency of restarting a pipeline in a processor that implements scouting. In one embodiment, the processor may reduce pipeline restart latency using two instruction fetch units that are configured to fetch and re-fetch instructions in parallel with one another. In some embodiments, the processor may reduce pipeline restart latency by initiating re-fetching instructions in response to determining that a commit operation is to be attempted with respect to one or more deferred instructions. In other embodiments, the processor may reduce pipeline restart latency by initiating re-fetching instructions in response to receiving an indication that a request for a set of data has been received by a cache, where the indication is sent by the cache before determining whether the data is present in the cache or not.
机译:公开了与减少实现侦察的处理器中重新启动管线的等待时间有关的技术。在一实施例中,处理器可使用两个指令提取单元来减少管线重新启动等待时间,所述两个指令提取单元被配置为彼此并行地获取和重新获取指令。在一些实施例中,处理器可以通过响应于确定要针对一个或多个延迟的指令尝试执行提交操作而启动重新获取指令来减少管线重启等待时间。在其他实施例中,处理器可以通过响应于接收到对高速缓存已经接收到对一组数据的请求的指示而发起重取指令来减少管线重启等待时间,其中该指示在确定是否由高速缓存发送之前由高速缓存发送。数据是否存在于缓存中。

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