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Method and apparatus for optimizing address generation for simultaneously running proximity-based BIST algorithms
Method and apparatus for optimizing address generation for simultaneously running proximity-based BIST algorithms
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机译:同时运行基于接近度的bist算法优化地址生成的方法和装置
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摘要
The invention discloses a method and a system for optimizing address generation for simultaneously running proximity-based Built-In-Self-Test (BIST) algorithms. The method also describes simultaneously testing proximity-based faults for different memories having column multiplexers of different sizes using the BIST algorithms. The system described above may be embodied in the form of a Built-In-Self-Test (BIST) controller. Further, the method includes selecting a memory having the largest size of column multiplexer (CMmax). After selecting the memory, size of an address-width register is extended to form an extended address-width register. Thereafter, an extended width address is generated using the extended address-width register and the extended width address is used to generate addresses for the memories. After generating the addresses, read and write operations are performed on the memories based on pre-defined rules, wherein the read and write operations provide testing of the memories.
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机译:本发明公开了一种用于优化地址生成以同时运行基于接近度的内置自测(BIST)算法的方法和系统。该方法还描述了使用BIST算法同时测试具有不同大小的列多路复用器的不同存储器的基于接近度的故障。上述系统可以以内置自测(BIST)控制器的形式实现。此外,该方法包括选择具有最大大小的列多路复用器(CM max Sub>)的存储器。选择存储器后,地址宽度寄存器的大小将扩展为一个扩展的地址宽度寄存器。此后,使用扩展地址宽度寄存器生成扩展宽度地址,并且使用扩展宽度地址生成用于存储器的地址。在生成地址之后,基于预定规则对存储器执行读取和写入操作,其中读取和写入操作提供对存储器的测试。
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