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Formation of a Masking Layer on a Dielectric Region to Facilitate Formation of a Capping Layer on Electrically Conductive Regions Separated by the Dielectric Regions

机译:在介电区上形成掩模层以促进在被介电区分开的导电区上形成覆盖层

摘要

A masking layer is formed on a dielectric region of an electronic device so that, during subsequent formation of a capping layer on electrically conductive regions of the electronic device that are separated by the dielectric region, the masking layer inhibits formation of capping layer material on or in the dielectric region. The capping layer can be formed selectively on the electrically conductive regions or non-selectively; in either case (particularly in the latter), capping layer material formed over the dielectric region can subsequently be removed, thus ensuring that capping layer material is formed only on the electrically conductive regions. Silane-based materials, such as silane-based SAMs, can be used to form the masking layer. The capping layer can be formed of an electrically conductive material (e.g., a cobalt alloy, a nickel alloy, tungsten, tantalum, tantalum nitride), a semiconductor material, or an electrically insulative material, and can be formed using any appropriate process, including conventional deposition processes such as electroless deposition, chemical vapor deposition, physical vapor deposition or atomic layer deposition.
机译:在电子器件的介电区上形成掩模层,以便在随后在由介电区隔开的电子器件的导电区上形成覆盖层的过程中,该掩模层抑制在其上或上方形成覆盖层材料。在介电区。覆盖层可以选择性地或非选择性地形成在导电区域上;优选地,覆盖层可以形成在覆盖层上。在任何一种情况下(特别是在后者中),随后都可以去除在介电区域上形成的覆盖层材料,从而确保仅在导电区域上形成覆盖层材料。可以使用基于硅烷的材料(例如基于硅烷的SAM)来形成掩膜层。覆盖层可以由导电材料(例如,钴合金,镍合金,钨,钽,氮化钽),半导体材料或电绝缘材料形成,并且可以使用任何适当的工艺来形成,包括传统的沉积工艺,例如化学沉积,化学气相沉积,物理气相沉积或原子层沉积。

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