首页> 外国专利> METHOD OF ENHANCING POWER SAVING IN AN INTEGRATED ELECTRONIC SYSTEM WITH DISTINCTLY POWERED ISLANDS OF FUNCTIONAL CIRCUITRIES AND RELATED DEVICE ARCHITECTURE

METHOD OF ENHANCING POWER SAVING IN AN INTEGRATED ELECTRONIC SYSTEM WITH DISTINCTLY POWERED ISLANDS OF FUNCTIONAL CIRCUITRIES AND RELATED DEVICE ARCHITECTURE

机译:具有功能电路和相关设备架构的离散供电孤岛的集成电子系统中提高功率节省的方法

摘要

A method for power saving in an integrated circuit device may include defining an off-switchable analog circuit island including an internal clock generating circuit, and at power-on of the integrated circuit device, supplying to clocked digital circuits of the integrated circuit device an auxiliary clock from the external controller. The auxiliary clock has a frequency determined by the external controller and being lower than the root clock signal. The method includes supplying external reset commands to the integrated circuit device until an active functioning condition of the integrated circuit device is asserted, and interrupting the supply of the auxiliary clock and enabling supply of the root clock signal to the clocked digital circuits when the active functioning condition of the integrated circuit device is asserted.
机译:一种用于集成电路装置中的功率节省的方法,可以包括:定义包括内部时钟生成电路的可断开开关的模拟电路岛,并且在集成电路装置上电时,向集成电路装置的时钟数字电路提供辅助。来自外部控制器的时钟。辅助时钟的频率由外部控制器确定,并且低于根时钟信号。该方法包括:向集成电路设备提供外部复位命令,直到断言该集成电路设备的活动功能状态为止;以及当该活动功能起作用时,中断辅助时钟的提供并且使根时钟信号能够提供给计时的数字电路。断言集成电路装置的状态。

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