Multiplexed proportional-integral-derivative filter architecture (Mux-PID) for control-loop applications

摘要

A multiplexed digital proportional-integral-derivative filter receives error signal samples and operates in different states during sub-cycles of a single system cycle. A single multiplier and a single adder within the filter calculate at least portions of a proportional control signal, an integral control signal and a derivative control signal for one error signal sample during successive sub-cycles. The calculated control signal portions are aggregated to produce a filtered error signal for the respective error signal sample. The original resolution at lower cost, or increased resolution at the original cost, are achieved, as well as full programmability of loop gain with only negligible increase in loop latency.