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Generating responses to patterns stimulating an electronic circuit with timing exception paths

机译:生成对具有时序异常路径的模式刺激电路的响应

摘要

Improved responses can be generated to scan patterns (e.g., test patterns) for an electronic circuit designs having timing exception paths by more accurately determining the unknown values that propagate to observation points in the circuit, where the response is captured. For instance, the responses are determined more accurately by analyzing the effect of sensitizing a timing exception path during each time frame associated with a scan pattern. Path sensitization can be determined based on observing whether values injected at starting points of the timing exception paths due to signal transitions and glitches propagate to their end points. The response can be updated by masking the affected end points and propagating unknown values further in the circuit to determine whether they are captured at observation points of the circuit. For instance, the methods and systems described herein may result in reduced unknowns, improved test coverage and test compression.
机译:通过更准确地确定传播到电路中观测点的观察点的未知值,可以生成改进的响应来扫描具有定时异常路径的电子电路设计的模式(例如,测试模式)。例如,通过分析在与扫描模式相关联的每个时间帧期间使定时异常路径敏感的效果,可以更准确地确定响应。可以基于以下情况来确定路径敏感度:观察由于信号过渡和毛刺而在时序异常路径的起点注入的值是否传播到其端点。可以通过屏蔽受影响的端点并在电路中进一步传播未知值以确定它们是否在电路的观察点处捕获,来更新响应。例如,本文描述的方法和系统可以导致减少的未知数,改进的测试覆盖率和测试压缩。

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