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Method and system for conducting design explorations of an integrated circuit

机译:进行集成电路设计探索的方法和系统

摘要

Method and system for conducting design explorations of an integrated circuit are disclosed. In one embodiment, the method includes obtaining a design description of the integrated circuit that includes a virtual design block, creating a representative netlist for representing the virtual design block, where the representative netlist includes one or more soft design models, and each soft design model comprises one or more template cells for modeling a portion of the integrated circuit. The method further includes defining physical attributes for the one or more soft design models in accordance with area requirements of the virtual design block, where the one or more soft design models are described with flexible shape and pin locations, performing design explorations of the integrated circuit using the one or more soft design models and their corresponding template cells, and generating a representative implementation of the integrated circuit using results of the design explorations.
机译:公开了用于进行集成电路的设计探索的方法和系统。在一个实施例中,该方法包括获得包括虚拟设计块的集成电路的设计描述,创建用于表示虚拟设计块的代表性网表,其中该代表性网表包括一个或多个软设计模型,以及每个软设计模型。包括一个或多个用于对集成电路的一部分建模的模板单元。该方法还包括根据虚拟设计块的面积要求来定义一个或多个软设计模型的物理属性,其中以灵活的形状和引脚位置描述一个或多个软设计模型,执行集成电路的设计探索。使用一个或多个软设计模型及其对应的模板单元,并使用设计探索的结果生成集成电路的代表性实现。

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