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Method and apparatus for analyzing circuit model by reduction and computer program product for analyzing the circuit model

机译:通过归约分析电路模型的方法和装置以及用于分析电路模型的计算机程序产品

摘要

Provided are a method and apparatus for analyzing a circuit model by reducing, and a computer program product for analyzing the circuit model. The circuit model at least includes independent current source models, resistance models, and capacitance models. Also, the circuit model forms a resistance capacitance (RC) network with independent current sources. The method includes selecting a node to be removed using resistance information and comparing conductance of a capacitor for a given time step and the total conductance of the node. Further, the method includes removing the selected nodes and generating RC elements and independent current sources using adjacent nodes, which maintain the accuracy of node voltages of a circuit reduced in an accuracy order used for entrywise perturbation of the corresponding circuit equation. Moreover, an efficient method of handling the independent current sources while reducing the circuit is provided.
机译:提供了一种用于通过还原来分析电路模型的方法和装置,以及一种用于分析电路模型的计算机程序产品。电路模型至少包括独立的电流源模型,电阻模型和电容模型。而且,电路模型形成具有独立电流源的电阻电容(RC)网络。该方法包括使用电阻信息选择要去除的节点,并且比较给定时间步长的电容器的电导率和该节点的总电导率。此外,该方法包括:去除所选择的节点;以及使用相邻节点来生成RC元件和独立电流源,所述相邻节点保持以用于对相应电路方程的进入扰动的精度顺序降低的电路的节点电压的精度。此外,提供了一种在减少电路的同时处理独立电流源的有效方法。

著录项

  • 公开/公告号US7987439B2

    专利类型

  • 公开/公告日2011-07-26

    原文格式PDF

  • 申请/专利权人 HONG BO CHE;YOUNG HWAN KIM;

    申请/专利号US20080027732

  • 发明设计人 HONG BO CHE;YOUNG HWAN KIM;

    申请日2008-02-07

  • 分类号G06F17/50;

  • 国家 US

  • 入库时间 2022-08-21 18:10:13

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