首页>
外国专利>
VLSI artwork legalization for hierarchical designs with multiple grid constraints
VLSI artwork legalization for hierarchical designs with multiple grid constraints
展开▼
机译:具有多个网格约束的分层设计的VLSI艺术品合法化
展开▼
页面导航
摘要
著录项
相似文献
摘要
A system and method are disclosed for legalizing a flat or hierarchical VLSI layout to meet multiple grid constraints and conventional ground rules. Given a set of ground rules with multiple grid constraints and a VLSI layout (either hierarchical or flat) which is layout-versus-schematic (LVS) correct but may not be ground rule correct, the system and method provide a legalized layout which meets the multiple grid constraints while maintaining LVS correctness and fixing the ground rule errors as much as possible with minimum layout perturbation from the input design. The system and method support multiple grid pitch constraints for hierarchical design, and provide for LVS correctness to be maintained while an on-grid solution possibly with some spacing violations.
展开▼