Method and circuit for differential clock pulse compensation between two clock-pulse systems

摘要

A differential clock pulse compensation is performed between the clock-pulse system (23) of a digital line-connected data interface and the asynchronous clock-pulse system (22) of a digital wireless data interface. A characteristic variable (20, 21) for the asynchronous differential clock pulse between the clock-pulse systems (22, 23) is monitored hereby. The data rate of the data (15, 16) transmitted over the line-connected data interface is adapted depending on the characteristic variable (20, 21).