Specification window violation identification with application in semiconductor device design

摘要

A method for identifying specification window violations for a system is described. The method includes generating a sample set of input parameters. The system is simulated using the sample set to generate an output set. A mathematical model is best-fit to the output set. A set of desirability functions is defined to an out-of-spec condition. The model is then searched using the desirability functions to identify a worst-case data point. The worst-case data point can then be determined as either being within specification or out of specification.