The invention relates to a method for testing an integrated circuit comprising a step of collecting a set of points (Wk, i, j) of a physical quantity while the integrated circuit executes a multiplication. The method includes dividing the set of points into a plurality of subsets of points (Ci, j), computing an estimate (HWi, j) of the value of the physical quantity for each subset (Ci , j, and apply to subsets of lateral points (Ci, j) a horizontal transverse statistical processing step using estimates of the value of the physical quantity, to verify a hypothesis on variables manipulated by the integrated circuit.
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