METHOD FOR PRODUCING A PLANAR SPACER, AN ASSOCIATED BIPOLAR TRANSISTOR AND AN ASSOCIATED BICMOS CIRCUIT ARRANGEMENT

摘要

The invention relates to a method for producing a planar spacer, an associated bipolar transistor and an associated biCMOS circuit arrangement, wherein the first and second spacer layers (3, 4) are formed on a substrate (1) after a sacrifice mask (2) is formed and first and second spacer layers (3, 4) are embodied. In order to produce auxiliary spacers (4S) on the second spacer layer (4), a first anisotropic etching process is carried out. Afterwards, a second anisotropic etching process is carried out by means of the auxiliary spacers (4S) for producing a planar spacer (PS), thereby making it possible to freely select the height of the thus produced planar spacer (PS), wherein the planarity thereof very much simplifies the continuation of the process. The inventive method makes it possible to produce components exhibiting improved electric properties.