首页> 外国专利> DIFFERENTIAL NITRIDE PULLBACK TO CREATE DIFFERENTIAL NFET TO PFET DIVOTS FOR IMPROVED PERFORMANCE VERSUS LEAKAGE

DIFFERENTIAL NITRIDE PULLBACK TO CREATE DIFFERENTIAL NFET TO PFET DIVOTS FOR IMPROVED PERFORMANCE VERSUS LEAKAGE

机译:差分氮化物回拉以将差分NFET创建为PFET图案,以改善性能与泄漏之间的关系

摘要

Disclosed are embodiments of an integrated circuit structure with field effect transistors having differing divot features at the isolation region-semiconductor body interfaces so as to provide optimal performance versus stability (i.e., optimal drive current versus leakage current) for logic circuits, analog devices and/or memory devices. Also disclosed are embodiments of a method of forming the integrated circuit structure embodiments. These method embodiments incorporate the use of a cap layer pullback technique on select semiconductor bodies and subsequent wet etch process so as to avoid (or at least minimize) divot formation adjacent to some but not all semiconductor bodies.
机译:公开了一种集成电路结构的实施例,该集成电路结构的场效应晶体管在隔离区-半导体本体界面处具有不同的草稿特征,从而为逻辑电路,模拟器件和/或逻辑器件提供最佳性能与稳定性(即最佳驱动电流与泄漏电流)。或存储设备。还公开了形成集成电路结构实施例的方法的实施例。这些方法实施例在选择的半导体本体上结合盖层拉回技术的使用以及随后的湿法蚀刻工艺,以便避免(或至少最小化)与一些但不是全部半导体本体相邻的草皮形成。

著录项

  • 公开/公告号EP2238616B1

    专利类型

  • 公开/公告日2011-07-06

    原文格式PDF

  • 申请/专利权人 IBM;

    申请/专利号EP20090757447

  • 申请日2009-05-28

  • 分类号H01L21/8238;H01L21/762;H01L29/78;H01L21/336;

  • 国家 EP

  • 入库时间 2022-08-21 17:56:55

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