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SEMICONDUCTOR MEMORY DEVICE, CAPABLE OF PROPERLY SELECTING A FAST EXIT MODE AND A SLOW EXIT MODE, A MEMORY CONTROL PART THEREOF, AND AN INFORMATION PROCESSING SYSTEM THEREOF
SEMICONDUCTOR MEMORY DEVICE, CAPABLE OF PROPERLY SELECTING A FAST EXIT MODE AND A SLOW EXIT MODE, A MEMORY CONTROL PART THEREOF, AND AN INFORMATION PROCESSING SYSTEM THEREOF
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机译:能够正确选择快速退出模式和慢速退出模式的半导体存储器,其存储器控制部及其信息处理系统
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摘要
PURPOSE: A semiconductor memory device, a memory control part thereof, and an information processing system thereof are provided to reduce power consumption by using a selection signal which is inputted to a semiconductor memory device when a power-down command is generated.;CONSTITUTION: A memory cell array(70) comprises a plurality of memory cells. An output buffer(81) outputs read data, which is read from the memory cell array, to the outside. A DLL(Delay Locked Loop) circuit(23) controls the operation timing of the output buffer. A power-down control circuit(100) stops the operation of a predetermined internal circuit in response to the generation of a power-down command from the outside. A clock generating circuit(22) generates an internal clock.;COPYRIGHT KIPO 2011
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