MULTI CHIP PACKAGE COMPRISING AN OUTPUT ENABLE SIGNAL GENERATION CIRCUIT AND THE DATA OUTPUT CONTROL METHOD OF THE MULTI CHIP PACKAGE, CAPABLE OF SETTING THE ENABLE TIMING OF AN OUTPUT ENABLE SIGNAL

摘要

PURPOSE: A multi chip package comprising an output enable signal generation circuit and the data output control method of the multi chip package is provided to enable a data path to improve data output speed when short chips are read.;CONSTITUTION: In a multi chip package comprising an output enable signal generation circuit and the data output control method of the multi chip package, a CAS latency decoder(2) decodes a mode register set code. The CAS latency decoder generates first and second CAS latency information. A latch unit(4) outputs first and second CAS latency signals after latching the first and second CAS latency information. The CAS latency multiplexer(5) outputs first or second CAS latency signals as an output CAS latency signal. An enable setting unit(6) sets the enable timing of the out enable signal.;COPYRIGHT KIPO 2012