首页> 外国专利> CHIP FUSE MANUFACTURING METHOD USING A POROUS AMORPHOUS NANOTEMPLATE, CAPABLE OF USING A LOW PRICE METAL AND AN ALUMINA SUBSTRATE

CHIP FUSE MANUFACTURING METHOD USING A POROUS AMORPHOUS NANOTEMPLATE, CAPABLE OF USING A LOW PRICE METAL AND AN ALUMINA SUBSTRATE

机译:使用多孔无定形纳米模板的芯片保险丝制造方法,能够使用低价金属和氧化铝基质

摘要

PURPOSE: A chip fuse manufacturing method using a porous amorphous nanotemplate is provided to improve the reaction speed and fusing speed by using a porous amorphous nano template as a thermal shield material.;CONSTITUTION: In a chip fuse manufacturing method using a porous amorphous nanotemplate, a substrate(10) is anodized to form porous amorphous nano template(11) on the top of the substrate. The substrate is a metallic and ceramic substrate. A metallic conductor or fusing material is coated on the porous amorphous nano template. A protective film(13) is coated at the upper part of the metallic conductor or the fusing material. An external electrode(14) connected to the metallic conductor or the fusing material is formed.;COPYRIGHT KIPO 2012
机译:目的:提供一种使用多孔无定形纳米模板的芯片熔丝制造方法,以通过使用多孔无定形纳米模板作为热屏蔽材料来提高反应速度和熔合速度。组成:在使用多孔无定形纳米模板的芯片熔丝制造方法中,对基板(10)进行阳极氧化以在基板的顶部上形成多孔非晶纳米模板(11)。基底是金属和陶瓷基底。金属导体或熔合材料涂覆在多孔非晶纳米模板上。在金属导体或熔断材料的上部涂有保护膜(13)。形成与金属导体或熔断材料连接的外部电极(14)。;COPYRIGHT KIPO 2012

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